Memory management apparatus, memory management method and non-transitory computer readable storage medium
US8954709B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2011 |
| Grant date | Feb 10, 2015 |
| Priority date | — |
| Expiry date | May 17, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1036
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory management apparatus has an ASID conversion table, an actual ASID use table, and a TLB flush control section. The ASID conversion table and the actual ASID use table manage virtual ASID, actual ASID and an overlap flag so that they are related for each VM. The TLB flush control section reads actual ASIDs allocated to VM as a switching target at the time of switching VM as a switching source into the VM as the switching target, determines whether the read actual ASID is allocated to the plurality of VMs in an overlapped manner with reference to the overlap flag, and sets the actual ASID in the read actual ASIDs determined being allocated in the overlapped manner as a target for the TLB flush.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.