Instruction set adapted for security risk monitoring
US8955111B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2011 |
| Grant date | Feb 10, 2015 |
| Priority date | — |
| Expiry date | Sep 24, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/552
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor is adapted to manage security risk by updating and monitoring a taint storage element in response to receipt of taint indicators, and responding to predetermined taint conditions detecting by the monitoring. The processor can be operable to execute instructions of a defined instruction set architecture and comprises an instruction of the instruction set architecture operable to access data from a source and operable to receive a taint indicator indicative of potential security risk associated with the data. The processor can further comprise a taint storage element operable for updating in response to receipt of the taint indicator and logic. The logic can be operable to update the taint storage element, process the taint storage element, determine a security risk condition based on the processing of the taint storage element, and respond to the security risk condition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.