Gate drive circuit and display apparatus having the same
US8957882B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2011 |
| Grant date | Feb 17, 2015 |
| Priority date | — |
| Expiry date | Jan 27, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/041
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate drive circuit includes a shift register in which plural stages are cascade-connected to each other. In an n-th stage, a pull-up part outputs a high voltage of a clock signal to an output node as a high voltage of an n-th gate signal in response to a high voltage on a first node. A pull-down part pulls the high voltage of the n-th gate signal down to a first low voltage in response to an (n+1)th carry signal. A discharging part discharges the first node to a second low voltage level lower than the first low voltage level in response to the (n+1)th carry signal. A carry part outputs the high voltage of the clock signal as an n-th carry signal (mirroring the n-th gate signal) in response to a high voltage on the first node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.