Patent · US Active

Redundant two-processor controller and control method

US8959392B2 · kind B2 · utility

6Cited by

11References

15Claims

0Family size

Assignee

Continental Teves AG & Co. OHG · DE

Inventors

Adrian Traskov · Steinbachl, DE
Thorsten Ehrenberg · Nauheim, DE
Lukusa Didier Kabulepa · Langen (Hessen), DE
Felix Wolf · Augsburg, DE

Key dates

Filing date	Mar 18, 2011
Grant date	Feb 17, 2015
Priority date	—
Expiry date	Oct 9, 2031

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/1645
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A redundant two-processor controller having a first processor (1) and a second processor (1) for the synchronous execution of a control program. The controller having at least a first multiplexer (70, 91) for optionally connecting at least a first peripheral unit (72, 95) to be actuated to one of the two processors (1, 2), and at least a first Comparison unit (70, 91) for monitoring the synchronization state of the two processors (1, 2) and for detecting a synchronization error. A restoration control unit (44) is designed to monitor the execution of at least one test program by the two processors (1, 2) after the occurrence of a synchronization error and to evaluate the test results, and which is designed to configure at least the first multiplexer (70, 91).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.