Semiconductor device having a test pad connected to an exposed pad
US8963150B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2011 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Aug 18, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/48247
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor device includes a circuit board including a ground portion, and a semiconductor package disposed on the circuit board. The semiconductor package includes an external connecting pad and an exposed pad. The exposed pad and the ground portion are electrically connected at a first surface of the exposed pad. A semiconductor chip is disposed on a second surface of the exposed pad and electrically connected to the external connecting pad. The first surface of the exposed pad is located external to the semiconductor package, and the second surface of the exposed pad is located within the semiconductor package. A test pad is disposed on the semiconductor chip and is electrically connected to the exposed pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.