Patent · US Active

High-frequency signal processing device

US8963593B2 · kind B2 · utility

1Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 18, 2014
Grant dateFeb 24, 2015
Priority date
Expiry dateMar 18, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L2207/06
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A high-frequency signal processing device having a frequency synthesizer (PLL: Phase Locked Loop) is provided. A control circuit measures oscillation frequencies obtained upon setting a bias current of an oscillation circuit to first and second bias setting values and acquires a frequency difference amount of the oscillation frequencies. The frequency difference amount may be acquired as difference amount of setting values of a coarse adjustment capacitance setting signal (CTRM) using, for example, an automatic frequency selector unit. The control circuit retains a relationship of a difference amount of bias setting values and a difference value of setting values of the CTRM and approximating the relationship to a linear function. Thereafter, the control circuit defines, upon switching the bias current during locking of the PLL, the CTRM based on the linear function and switches the CTRM together with the bias current.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.