Frequency compensation techniques for low-power and small-area multistage amplifiers
US8963639B2 · kind B2 · utility
4Cited by
2References
16Claims
0Family size
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Key dates
| Filing date | Feb 19, 2013 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Apr 29, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45674
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A three stage amplifier is provided and the three stage amplifier comprises a first gain stage, a second gain stage and a third gain stage wherein said first stage receives an amplifier input signal and said third gain stage outputs an amplifier output signal. The amplifier includes a feedback loop having a current buffer and a compensation capacitance provided from the output of said third gain stage to the output of the first gain stage. In addition, an active left half plane zero stage is embedded in said feedback loop for cancelling a parasitic pole of said feedback loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.