Spatial and temporal de-interlacing with error criterion
US8964116B2 · kind B2 · utility
1Cited by
1References
19Claims
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Key dates
| Filing date | May 23, 2006 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Jun 28, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N7/0142
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A de-interlacing device and method are provided that may be used in a memory based video processor. The de-interlacer mixes the output of a temporal de-interlacer and a spatial de-interlacer. Two separate error values are used; one for the temporal de-interlacer and another for the spatial de-interlacer. The de-interlacing device calculates from the two error values, using a non-linear mapping, a mix factor used to mix between the outputs of the spatial and temporal de-interlacers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.