Nonvolatile semiconductor memory device
US8964447B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2009 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Sep 22, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile semiconductor memory device comprises a cell array including a plurality of first lines, a plurality of second lines intersecting the plurality of first lines, and a plurality of memory cells arranged in matrix and connected at intersections of the first and second lines between both lines, each memory cell containing a serial circuit of an electrically erasable programmable variable resistive element of which resistance is nonvolatilely stored as data and a non-ohmic element; and a plurality of access circuits operative to simultaneously access the memory cells physically separated from each other in the cell array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.