For small cell demodulation reference signal and initial synchronization
US8964705B2 · kind B2 · utility
7Cited by
4References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2013 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Jul 23, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W28/06
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Described herein is a network element with a processor. The processor is configured to promote transmitting a first physical resource block (PRB) pair that contains a first demodulation reference signal (DMRS) pattern. The processor is further configured to promote transmitting a second PRB pair that contains a second DMRS pattern. The first DMRS pattern is a subset of the second DMRS pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.