Asynchronous pipelined interconnect architecture with fanout support
US8964795B2 · kind B2 · utility
7Cited by
6References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2009 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Aug 31, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/25
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Circuits comprising an asynchronous programmable interconnect with fan out support that include a multi-port switch and a first and second buffer-switch circuit, and methods of forming such circuits, are provided. Additional circuits and methods are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.