Fine gain tuning
US8965316B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 16, 2010 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Dec 27, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03J3/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit tuneable between first and second frequencies comprising gain control circuitry operable to control the gain of the circuit between the first and second frequencies, the gain control circuitry comprising a resistor network having: at least two resistor lines arranged in parallel, each resistor line comprising one or more resistors; and for each resistor line, a switch operable to select or deselect the corresponding resistor line; the resistor lines and switches being arranged such that the net resistance of the resistor network is the parallel sum of each of the selected resistor lines; and logic circuitry configured to control said switches so as to minimize the variation in gain of the circuit between the first and second frequencies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.