Method for power management of data buses in electronic devices
US8966302B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 21, 2010 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Jul 28, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are systems and methods for execution by a core of a peripheral component to provide power management for a data bus in a electronic device, such as a mobile electronic device. One method comprises determining whether a device in the peripheral component is inactive, transmitting a request for deactivation of at least one data channel to the device, receiving a command to deactivate the at least one data channel, determining whether any remaining devices in the peripheral component are active, and placing the peripheral component in a first low power mode wherein the core remains active in order to monitor a data bus clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.