Vertical GaN-based semiconductor device
US8969920B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2011 |
| Grant date | Mar 3, 2015 |
| Priority date | — |
| Expiry date | Jul 24, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/513
Abstract
A vertical semiconductor device in which pinch-off characteristics and breakdown voltage characteristics can be stably improved by fixing the electric potential of a p-type GaN barrier layer with certainty is provided. The semiconductor device includes a GaN-based stacked layer having an opening, a regrown layer including a channel located so as to cover a wall surface of the opening, an n+-type source layer that is in ohmic contact with the source electrode, a p-type GaN barrier layer, and a p+-type GaN-based supplementary layer located between the p-type GaN barrier layer and the n+-type source layer. The p+-type GaN-based supplementary layer and the n+-type source layer form a tunnel junction to fix the electric potential of the p-type GaN barrier layer at a source potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.