Patent · US Active

Clock signal synchronization

US8970276B1 · kind B1 · utility

4Cited by
7References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 17, 2013
Grant dateMar 3, 2015
Priority date
Expiry dateDec 17, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K3/0375
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Circuits and methods are introduced to allow for timing relationship between a clock signal and a synchronization signal to be observed. The observations may include observing the timing relationship between a capture edge of the clock signal and a transition of the synchronization signal. Based on the observations the timing of the synchronization signal transition may be adjusted. Observing the timing relationship may include providing a delayed synchronization signal and a delayed clock signal. The delayed synchronization signal may provide what happens before the capture edge of the clock signal. The delayed clock signal may provide what happens after the capture edge of the clock signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.