Phase-arrayed device and method for calibrating the phase-arrayed device
US8970427B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2012 |
| Grant date | Mar 3, 2015 |
| Priority date | — |
| Expiry date | Mar 24, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01Q3/2605
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A phase-arrayed device includes: a signal processing circuit arranged to generate a specific signal; a first phase-arrayed channel arranged to provide a first phase-arrayed signal according to the specific signal; a first conducting path arranged to conduct the specific signal to the first phase-arrayed channel; a second conducting path arranged to conduct the first phase-arrayed signal to the signal processing circuit; and a detecting circuit, arranged to detect a mismatch between the first phase-arrayed signal and a reference signal to generate a detecting signal utilized for calibrating the first phase-arrayed signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.