Patent · US Active

Memory interface chip corresponding to different memories and method of establishing memory transmission channel

US8972636B2 · kind B2 · utility

0Cited by
3References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 7, 2011
Grant dateMar 3, 2015
Priority date
Expiry dateApr 9, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/1684
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory interface chip is disclosed and includes a data output unit and a control module, wherein the data output module receives data from an external source. The data output unit can be selectively connected to different memory structures. The data output unit includes a first output channel and a second output channel, wherein the channels respectively generate a first output signal and a second output signal based on the data received. The control module selectively closes off the first output channel or the second output channel based on the memory architecture of the memory connected to the data output unit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.