Exchanging data between memory controllers
US8972667B2 · kind B2 · utility
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6References
13Claims
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Key dates
| Filing date | Jun 27, 2012 |
| Grant date | Mar 3, 2015 |
| Priority date | — |
| Expiry date | Feb 23, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1657
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A device with an interconnect having a plurality of memory controllers for connecting the plurality of memory controllers. Each memory controller of the plurality of memory controllers is coupled to an allocated memory for storing data. Further, each memory controller of the plurality of memory controllers has one accelerator of a plurality of accelerators for mutually exchanging data over the interconnect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.