Patent · US Active

Semiconductor device and manufacturing method

US8975167B2 · kind B2 · utility

4Cited by
1References
12Claims
0Family size

Assignee

Inventor

Key dates

Filing dateNov 27, 2012
Grant dateMar 10, 2015
Priority date
Expiry dateMay 5, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/017

Abstract

A fabrication process of a semiconductor device is disclosed. The method includes providing a semiconductor substrate with a first insulation layer formed on the semiconductor substrate and a fin formed on the surface of the first insulation layer, and forming a fully-depleted semiconductor layer on sidewalls of the fin, and the fully-depleted semiconductor layer having a material different from that of the fin. The method also includes forming a second insulation layer covering the fully-depleted semiconductor layer, and removing the fin to form an opening exposing sidewalls of the fully-depleted semiconductor layer. Further, the method includes forming a gate dielectric layer on part of the sidewalls of the fully-depleted semiconductor layer such that the part of the sidewalls of the fully-depleted semiconductor layer form channel regions of the semiconductor device, and forming a gate electrode layer covering the gate dielectric layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.