Method of manufacturing a memory device using fine patterning techniques
US8975178B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 4, 2012 |
| Grant date | Mar 10, 2015 |
| Priority date | — |
| Expiry date | Nov 6, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a method of manufacturing a device, includes forming a first core including a line portion extending between first and second regions and having a first width and a fringe having a dimension larger than the first width, forming a mask on the fringe and on a first sidewall on the first core, removing the first core so that a remaining portion having a dimension larger than the first width is formed below the mask, forming a second sidewall on a pattern corresponding the first sidewall and the remaining portion, the second sidewall having a second width less than the first width and facing a first interval less than the first width in the first region and facing a second interval larger than the first interval in the second region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.