Amplifiers with improved isolation
US8975968B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2013 |
| Grant date | Mar 10, 2015 |
| Priority date | — |
| Expiry date | Apr 7, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/7206
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Amplifiers with improved isolation are disclosed. In an exemplary design, an apparatus (e.g., a wireless device, an integrated circuit, etc.) includes an amplifier having a gain transistor, first and second cascode transistors, and a shunt transistor. The gain transistor receives an input signal and provides an amplified signal. The first cascode transistor is coupled between the gain transistor and an intermediate node and receives the amplified signal. The second cascode transistor is coupled between the intermediate node and an output node and provides an output signal. The shunt transistor is coupled between the intermediate node and circuit ground. The first and second cascode transistors are enabled to provide the output signal. The shunt transistor is (i) disabled when the cascode transistors are enabled and (ii) enabled to short the intermediate node to circuit ground when the cascode transistors are disabled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.