Patent · US Active

Memory module for simultaneously providing at least one secure and at least one insecure memory area

US8976585B2 · kind B2 · utility

1Cited by
19References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 21, 2010
Grant dateMar 10, 2015
Priority date
Expiry dateOct 21, 2030

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/1056
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory module has at least one secure and at least one insecure memory area, separate write/read electronic units for each of the memory areas and at least one shared analog circuit part such as a voltage supply circuit for supplying the write/read electronic units and/or the memory areas.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.