Nonvolatile memory device and memory system including the same
US8976591B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2012 |
| Grant date | Mar 10, 2015 |
| Priority date | — |
| Expiry date | Feb 1, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to example embodiments, a nonvolatile memory device includes a first and a second NAND string. The first NAND string includes a first string selection transistor, a first local ground and a first global ground selection transistor, and first memory cells stacked in a direction perpendicular to a substrate. The second NAND string includes a second string selection transistor, a second local ground and a second global ground selection transistor, and second memory cells stacked in the direction perpendicular to the substrate. The device includes a selection line driver including path transistors configured to select and provide at least one operation voltage to the first and second string selection transistors, the first and second local and global ground selection transistors. The first and second string selection transistors are electrically isolated from each other, and the first and second global ground selection transistors are electrically connected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.