Controller
US8976596B1 · kind B1 · utility
4Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2013 |
| Grant date | Mar 10, 2015 |
| Priority date | — |
| Expiry date | Nov 22, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, CONTROLLER includes a phase comparator that receives a data strobe signal outputted from a memory in response to a read enable signal, and a delayed data strobe signal formed by applying a delay to the data strobe signal, and outputs a result of comparison between phases of two signals. The controller also includes a Duty control unit that corrects a Duty of the read enable signal outputted to the memory based upon the comparison result of the phase comparator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.