High-speed memory write driver circuit with voltage level shifting features
US8976607B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2013 |
| Grant date | Mar 10, 2015 |
| Priority date | — |
| Expiry date | May 31, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various aspects of a fast, energy efficient write driver capable of efficient operation in a dual-voltage domain memory architecture are provided herein. Specifically, various aspects of the write driver described herein combine a high speed driver with voltage level shifting capabilities that may be implemented efficiently in reducing use of silicon area while using lower power. The write driver circuit shifts or adjusts voltage levels between a first voltage domain to a second voltage domain. In one example, the write driver circuit is coupled to a global write bitline and a local write bitline that is coupled to one or more bitcells (of SRAM memory). The write driver circuit converts a first voltage level at the global write bitline to a second voltage level at the local write bitline during a write operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.