Divider circuit and division method
US8977671B2 · kind B2 · utility
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3References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 13, 2011 |
| Grant date | Mar 10, 2015 |
| Priority date | — |
| Expiry date | Apr 14, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/535
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A divider circuit includes: a register which is configured of an even number of bits and in which a dividend data is stored. A shift operation section is configured to acquire a data stored in an upper bit portion of the register when the even number of bits of the register is equally divided to the upper bit portion and a lower bit portion, as a quotient data when the dividend data is divided by a maximum of a divisor data which can be expressed by a half of the even number of bits of the register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.