Semiconductor device and method of manufacturing the same
US8981422B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 7, 2012 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | Feb 7, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To prevent contact plugs formed to sandwich an abutting portion between gate electrodes, from being short-circuited via a void formed inside an insulating film of the abutting portion. Over sidewalls SW facing each other in the abutting portion between gate electrodes G2 and G5, a liner insulating film 6 and an interlayer insulating film 7 are formed. Between the sidewalls SW, the liner insulating film 6 formed on each of the side walls of the sidewalls SW are brought in contact with each other to close a space between the sidewalls SW to prevent a void from being generated inside the interlayer insulating film 7 and the liner insulating film 6.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.