MEMS chip package and method for manufacturing an MEMS chip package
US8981499B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2012 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | Dec 27, 2032 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81B2201/0257
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A MEMS chip package includes a first chip, a second chip, a first coupling element, and a first redistribution layer. The first chip has a first chip surface and a second chip surface, which is opposite the first chip surface. The second chip has a first chip surface and a second chip surface, which is opposite the first chip surface. The first coupling element couples the first chip surface of the second chip to the first chip surface of the first chip, so that a first cavity is defined between the first chip and the second chip. The first redistribution layer is mounted on the second chip surface of the second chip and is configured to provide contact with a substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.