Multi-layer integrated transmission line circuits having a metal routing layer that reduces dielectric losses
US8981864B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2012 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | Dec 18, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Multi-layer in integrated transmission line circuits are provided having improved signal loss characteristics. A multi-layer integrated transmission line circuit, such as a stripline circuit or a microstrip circuit, comprises at least one reference layer; at least one conducting layer having one or more conducting strips, wherein the at least one conducting layer is separated from the at least one reference layer by a substrate; and at least one additional layer positioned between the at least one conducting layer and the at least one reference layer. The multi-layer integrated transmission line circuit may also comprise a dielectric insulating material, such as an organic material or a ceramic material. The additional layers increase a dielectric thickness of the multi-layer integrated transmission line circuit to reduce dielectric losses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.