Background calibration of ADC reference voltage due to input signal dependency
US8981972B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2013 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | Sep 17, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/46
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention may provide an analog-to-digital converter (ADC) system. The ADC system may include an analog circuit to receive an input signal and a reference voltage, and to convert the input signal into a raw digital output. The analog circuit may include at least one sampling element to sample the input signal during a sampling phase and reused to connect to the reference voltage during a conversion phase, and an ADC output to output the raw digital output. The ADC system may also include a digital processor to receive the raw digital output and for each clock cycle, to digitally correct reference voltage errors in the analog-to-digital conversion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.