Nonvolatile memory and erasing method thereof
US8982642B2 · kind B2 · utility
1Cited by
2References
5Claims
0Family size
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Key dates
| Filing date | Sep 12, 2014 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | Sep 12, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.