Method and apparatus for memory control
US8982644B1 · kind B1 · utility
0Cited by
6References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 20, 2013 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | Jun 1, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Aspects of the disclosure provide an integrated circuit (IC) that includes a processing unit and a signal-terminal matching circuitry. The processing unit is configured to communicate with an external memory device through conductive couplings that electrically couple terminals of an IC external interface respectively with terminals of the external memory device. The external memory device is disposed on a circuit substrate separate from the IC. The signal-terminal matching circuitry is configured to match memory control signals to the terminals of the IC external interface based on the external memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.