Process variable transmitter with variable frequency clock circuit for rejection of clock synchronous noise
US8982989B2 · kind B2 · utility
1Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 28, 2013 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | Jun 28, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/068
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a process variable transmitter, a sensor signal is sampled, using a clock signal, at a sensor sampling frequency. Interference is also sampled at the sensor sampling frequency. A comparison is made to determine whether the interference at the sensor sampling frequency or harmonics of the sensor sampling frequency exceed a threshold level. If so, the clock signal is changed to adjust the sensor sampling frequency away from the frequency of the interference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.