Memory protection unit and method for controlling an access to memory device
US8984245B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2011 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | Jan 5, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory protection unit includes at least a first access control unit and a second access control unit programmed for controlling an access to a memory device. Further a method to operate a processing system comprising multiple processing devices and multiple memory protection units associated to the multiple processing devices. The access to the memory by a processing device is approved if first access control unit and second access control unit of the memory protection associated to the processing device approves the access and access is rejected if first access control unit or second access control unit rejects the access. The first access control unit is programmable by the associated processing device alone and the programming of the second access control unit is readable by an additional processing device which is to be used in a system with multiple programming devices, not the associate processing device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.