Patent · US Active

Single feedback loop for parallel architecture buck converter—LDO regulator

US8988054B2 · kind B2 · utility

12Cited by
15References
18Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 27, 2011
Grant dateMar 24, 2015
Priority date
Expiry dateFeb 27, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH02M1/0045
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

An embodiment of a voltage regulation circuit includes a DC-DC converter configured to control a first current provided from a source to a load via a first output, and a linear regulator configured to control a second current provided from the source to the load via a second output. The voltage regulation circuit further includes a single control loop configured to receive an output voltage across the load and a first reference voltage. The single control loop is further configured to generate a single error signal between the output voltage across the load and the first reference voltage and to control the DC-DC converter and the linear regulator using the single error signal such that when the single error signal is outside of a predetermined range the DC-DC converter provides the first current to the load and the linear regulator provides the second current to the load simultaneously.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.