Data transmission system and semiconductor circuit
US8988160B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2011 |
| Grant date | Mar 24, 2015 |
| Priority date | — |
| Expiry date | Jan 24, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B3/02
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A data transmission system is provided in which it is possible to perform both of suppressing the degrading of the slew rate and suppressing the ringing even if load capacitance of an input buffer is changed.The data transmission system transmitting data from an output buffer to the input buffer through a trace is provided with first RC parallel circuits connected in series to the trace on a first Printed Circuit Board (PCB) on which the output buffer is mounted, and second RC parallel circuits connected in series to the trace on a second Printed Circuit Board (PCB) on which the input buffer is mounted, and which can be connected and separated to and from the first Printed Circuit Board (PCB).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.