Semiconductor memory device and refresh leveraging driving method thereof
US8988964B2 · kind B2 · utility
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14Claims
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Key dates
| Filing date | Nov 5, 2013 |
| Grant date | Mar 24, 2015 |
| Priority date | — |
| Expiry date | Nov 5, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A refresh leveraging driving method is provided which includes deciding a unit of word lines to be driven at a refresh leveraging operation to be the same as a redundancy repair row unit setting a lower row address of an input refresh leveraging address corresponding to the decided refresh leveraging row driving unit to a don't care state; and internally generating the don't care lower row address of the refresh leveraging address to drive word lines according to a combined refresh leveraging address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.