Patent · US Active

Controller, semiconductor storage device and method of controlling data writing

US8990458B2 · kind B2 · utility

18Cited by
0References
20Claims
0Family size

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Key dates

Filing dateJun 5, 2013
Grant dateMar 24, 2015
Priority date
Expiry dateAug 23, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2211/5641
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

According to one embodiment, a memory controller includes a mode selection part that selects one of a MLC-mode and a SLC-mode, after a write command is decoded by a command decode part, and a write part that executes a data writing to a storage memory by using one of the MLC-mode and the SLC-mode selected by the mode selection part. The mode selection part is configured to check whether a first data wrote from a host to a buffer memory is a time-continuous data that is wrote continuously during a predetermined period, execute the data writing of a second data from the buffer memory to the storage memory in the MLC-mode, when the first data is the time-continuous data, and execute the data writing of the second data from the buffer memory to the storage memory in the SLC-mode, when the first data is not the time-continuous data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.