Dedicated interface architecture for a hybrid integrated circuit
US8990757B2 · kind B2 · utility
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95References
6Claims
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Key dates
| Filing date | May 2, 2008 |
| Grant date | Mar 24, 2015 |
| Priority date | — |
| Expiry date | May 2, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7867
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An interface design for a hybrid IC that utilizes dedicated interface tracks to allow signals to interface distributively with the logic blocks of the FPGA portion providing for faster and more efficient communication between the FPGA and ASIC portions of the hybrid IC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.