CMOS interpolator for a serializer/deserializer communication application
US8995600B1 · kind B1 · utility
8Cited by
6References
8Claims
0Family size
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Key dates
| Filing date | Aug 5, 2014 |
| Grant date | Mar 31, 2015 |
| Priority date | — |
| Expiry date | Aug 5, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/04
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase interpolator (PI) is provided to adjust the phase of a clock such that the phase is aligned to an incoming data pattern from a data stream. The data can be captured from a device such as a flip-flop or the like. The present technique uses a PI (digital to phase) and a digital state machine in a feedback loop to set the correct digital code to the PI inputs to achieve an appropriate clock phase. Of course, there can be variations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.