Multiple algorithm cryptography system
US8995651B1 · kind B1 · utility
1Cited by
2References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2011 |
| Grant date | Mar 31, 2015 |
| Priority date | — |
| Expiry date | Apr 14, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes an interface module, an addressing module, and a multiplier module. The interface module is configured to (i) receive operands and configuration data for a Rivest-Shamir-Adleman (RSA) operation or an Elliptic Curve Cryptography (ECC) operation, and (ii) control access to a random access memory (RAM). The addressing module is configured to allocate memory space within the RAM for storage of the operands. The multiplier module includes a Montgomery multiplier configured to perform Montgomery multiplication operation for both the RSA operation and the ECC operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.