Patent · US Active

Integrated link calibration and multi-processor topology discovery

US8996770B2 · kind B2 · utility

0Cited by
7References
9Claims
0Family size

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Key dates

Filing dateAug 23, 2012
Grant dateMar 31, 2015
Priority date
Expiry dateMar 14, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F15/177
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Integrating link calibration and dynamic topology discovery in a multi-processor system establishes a first of a plurality of processors in the multi-processor system as a director of integrated link calibration and dynamic topology discovery. A plurality of high speed interconnects connects the plurality of processors with each other. The director processor directs calibration of each of the plurality of high speed interconnects via a shared hardware resource. The shared hardware resource is shared among the plurality of processors. Topology of the multi-processor system is incrementally discovered as each of the plurality of high speed interconnects is calibrated based on a result of each of the plurality of high speed interconnects being calibrated.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.