Multi latency configurable cache
US8996833B2 · kind B2 · utility
1Cited by
5References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2013 |
| Grant date | Mar 31, 2015 |
| Priority date | — |
| Expiry date | Sep 24, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0895
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described herein are technologies for optimizing different cache configurations of a size-configurable cache. One configuration includes a base cache portion and a removable cache portion, each with different latencies. The latency of the base cache portion is modified to correspond to the latency of the removable portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.