Method of manufacturing semiconductor device and semiconductor device
US9000595B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 3, 2014 |
| Grant date | Apr 7, 2015 |
| Priority date | — |
| Expiry date | Apr 3, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1815
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To provide a semiconductor device having a reduced size and thickness while suppressing deterioration in reliability. After a semiconductor wafer is ground at a back surface thereof with a grinding material into a predetermined thickness, the resulting semiconductor wafer is diced along a cutting region to obtain a plurality of semiconductor chips. While leaving grinding grooves on the back surface of each of the semiconductor chips, the semiconductor chip is placed on the upper surface of a die island via a conductive resin paste so as to face the back surface of the semiconductor chip and the upper surface of the die island each other. The die island has, on the upper surface thereof, a concave having a depth of from 3 μm to 10 μm from the edge of the concave to the bottom of the concave.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.