Imager readout architecture utilizing A/D converters (ADC)
US9001234B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 27, 2012 |
| Grant date | Apr 7, 2015 |
| Priority date | — |
| Expiry date | Apr 1, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/8227
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The invention provides an imager readout architecture utilizing analog-to-digital converters (ADC), the architecture comprising a band-limited sigma delta modulator (SDM) ADC; and a serpentine readout, which can be configured to allow the band-limited SDM to multiplex between multiple columns by avoiding discontinuities at the edges of a row. SDM ADC image reconstruction artifacts are minimized using a modified serpentine read out methodology, the methodology comprising using primary and redundant slices with the serpentine read out in opposite directions and averaging the slices. Advantageously, the invention can be used to develop a read out integrated circuit (ROIC) for strained layer superlattice imagers (SLS) using sigma delta modulator (SDM) based analog to digital converters (SDM ADC).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.