Tracking mechanisms
US9001613B2 · kind B2 · utility
4Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2012 |
| Grant date | Apr 7, 2015 |
| Priority date | — |
| Expiry date | Apr 18, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A tracking circuit in a memory macro includes a data line, a first tracking cell, and a plurality of transistors. The first tracking cell is electrically coupled to the data line. The plurality of transistors is electrically coupled to the data line. The plurality of transistors is configured to cause a delay on a transition of a signal of the data line based on a delay current. The signal of the data line is configured for use in generating a signal of a control line of a memory cell of the memory macro.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.