Power-aware thread scheduling and dynamic use of processors
US9003215B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 22, 2011 |
| Grant date | Apr 7, 2015 |
| Priority date | — |
| Expiry date | Jun 22, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques and apparatuses for providing power-aware thread scheduling and dynamic use of processors are disclosed. In some aspects, a multi-core system is monitored to determine core activity. The core activity may be compared to a power policy that balances a power savings plan with a performance plan. One or more of the cores may be parked in response to the comparison to reduce power consumption by the multi-core system. In additional aspects, the power-aware scheduling may be performed during a predetermined interval to dynamically park or unpark cores. Further aspects include adjusting the power state of unparked cores in response to the comparison of the core activity and power policy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.