Patent · US Active

Method and apparatus for fabricating piezoresistive polysilicon by low-temperature metal induced crystallization

US9006016B2 · kind B2 · utility

2Cited by
4References
31Claims
0Family size

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Key dates

Filing dateJun 24, 2013
Grant dateApr 14, 2015
Priority date
Expiry dateNov 30, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10N30/308
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present invention provides a method and apparatus for fabricating piezoresistive polysilicon on a substrate by low-temperature metal induced crystallization by: (1) providing the substrate having a passivation layer; (2) performing, at or near room temperature in a chamber without breaking a vacuum or near-vacuum within the chamber, the steps of: (a) creating a metal layer on the passivation layer, and (b) creating an amorphous silicon layer on the metal layer, wherein the metal layer and the amorphous silicon layer have approximately the same thickness; (3) annealing the substrate, the passivation layer, the metal layer and the amorphous silicon layer at a temperature equal to or less than 600° C. and a period of time equal to or less than three hours to form a doped polysilicon layer below a residual metal layer; and (4) removing the residual metal layer to expose the doped polysilicon layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.