Method for fabricating phase change memory
US9006022B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 2013 |
| Grant date | Apr 14, 2015 |
| Priority date | — |
| Expiry date | Oct 17, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
Abstract
A method is provided for fabricating a phase change memory. The method includes providing a semiconductor substrate having a bottom electrode connecting with one or more semiconductor devices, and forming a first dielectric layer on the semiconductor substrate. The method also includes forming a loop-shape electrode in the first dielectric layer, and forming a second dielectric layer having a first opening exposing a portion of the first dielectric layer and a portion of the loop-shape electrode. Further, the method includes forming a phase change layer in the first opening of the second dielectric layer such that a contact area between the phase change layer and the loop-shape electrode may be controlled to achieve desired contact, and forming a top electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.