Algorithm for 64-bit address mode optimization
US9009686B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2012 |
| Grant date | Apr 14, 2015 |
| Priority date | — |
| Expiry date | May 3, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/445
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment of the present invention sets forth a technique for extracting a memory address offset from a 64-bit type-conversion expression included in high-level source code of a computer program. The technique involves receiving the 64-bit type-conversion expression, where the 64-bit type-conversion expression includes one or more 32-bit expressions, determining a range for each of the one or more 32-bit expressions, calculating a total range by summing the ranges of the 32-bit expressions, determining that the total range is a subset of a range for a 32-bit unsigned integer, calculating the memory address offset based on the ranges for the one or more 32-bit expressions, and generating at least one assembly-level instruction that references the memory address offset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.